中文名: Intel® 64 and IA-32體系結構：軟件開發人員手冊
原名: Intel® 64 and IA-32 Architectures Software Developer's Manual
作者: Intel Corporation
圖書分類: 軟件
資源格式: PDF
版本: 文字版
出版社: Intel Corporation
書號: 25462-042US
發行時間: 2012年03月
地區: 美國
語言: 英文
簡介:

內容介紹：
匯編語言和高級語言的最根本的區別在於：在匯編語言中，程序員必須掌握數據存儲和機器相關的大量細節。與高級語言相比，在聲明和移動數據時，匯編器給了程序員極大的自由。匯編器只進行很少的錯誤檢查，但卻提供了大量的操作符和尋址表達式，使程序員幾乎能夠做任何事情。然而，這種自由是必須付出一定代價的。這種代價就是在開始編寫有意義的程序之前，開發人員必須掌握大量的細節知識。因而這也是《Intel® 64 and IA-32 Architectures Software Developer's Manuall》一書的功能所在。
內容截圖：

目錄:
Volume 1: Basic Architecture
Chapter 1 About This Manual
Chapter 2 Intel® 64 and IA-32 Architectures
Chapter 3 Basic Execution Environment
Chapter 4 Data Types
Chapter 5 Instruction Set Summary
Chapter 6 Procedure Calls, Interrupts, and Exceptions
Chapter 7 Programming With General-Purpose Instructions
Chapter 8 Programming with the x87 FPU
Chapter 9 Programming with Intel® MMX™ Technology
Chapter 10 Programming with Streaming SIMD Extensions (SSE)
Chapter 11 Programming with Streaming SIMD Extensions 2 (SSE2)
Chapter 12 Programming with SSE3, SSSE3, SSE4 and AESNI
Chapter 13 Programming with AVX
Chapter 14 Input/Output
Chapter 15 Processor Identification and Feature Determination
Appendix A EFLAGS Cross-Reference
Appendix B EFLAGS Condition Codes
Appendix C Floating-Point Exceptions Summary
Appendix D Guidelines for Writing x87 FPU Exception Handlers
Appendix E Guidelines for Writing SIMD Floating-Point Exception Handlers
Volume 2: Instruction Reference, A-Z
Chapter 1 About This Manual
Chapter 2 Instruction Format
Chapter 3 Instruction Set Reference, A-L
Chapter 4 Instruction Set Reference, M-Z
Chapter 5 Safer Mode Extensions Reference
Appendix A Opcode Map
Appendix B Instruction Formats and Encodings
Appendix C Intel® C/C++ Compiler Intrinsics and Functional Equivalents
Volume 3: System Programming Guide
Chapter 1 About This Manual
Chapter 2 System Architecture Overview
Chapter 3 Protected-Mode Memory Management
Chapter 4 Paging
Chapter 5 Protection
Chapter 6 Interrupt and Exception Handling
Chapter 7 Task Management
Chapter 8 Multiple-Processor Management
Chapter 9 Processor Management and Initialization
Chapter 10 Advanced Programmable Interrupt Controller (APIC)
Chapter 11 Memory Cache Control
Chapter 12 Intel® MMX™ Technology System Programming
Chapter 13 System Programming For Instruction Set Extensions And Processor Extended States
Chapter 14 Power and Thermal Management
Chapter 15 Machine-Check Architecture
Chapter 16 Interpreting Machine-Check Error Codes
Chapter 17 Debugging, Branch Profiling, and Time-Stamp Counter
Chapter 18 Performance Monitoring
Chapter 19 Performance-Monitoring Events
Chapter 20 8086 Emulation
Chapter 21 Mixing 16-Bit and 32-Bit Code
Chapter 22 Architecture Compatibility
Chapter 23 Introduction to Virtual-Machine Extensions
Chapter 24 Virtual-Machine Control Structures
Chapter 25 VMX Non-Root Operation
Chapter 26 VM Entries
Chapter 27 VM Exits
Chapter 28 VMX Support for Address Translation
Chapter 29 VMX Instruction Reference
Chapter 30 Virtual-Machine Monitor Programming Considerations
Chapter 31 Virtualization of System Resources
Chapter 32 Handling Boundary Conditions in a Virtual Machine Monitor
Chapter 33 System Management Mode
Chapter 34 Model-Specific Registers (MSRs)
Appendix A VMX Capability Reporting Facility
Appendix B Field Encoding in VMCS
Appendix C VMX Basic Exit Reasons
Index