中文名: 電子設計套件
英文名: Xilinx ISE Design Suite
資源格式: 光盤鏡像
版本: v14.4
發行時間: 2013年
制作發行: Xilinx Inc.
語言: 英文
簡介:




語言：英文
網址：http://www.xilinx.com/products/design-tools/ise-design-suite/index.htm
類別：電子設計套件
Xilinx 設計解決方案一如既往地利用新技術來降低總設計成本，並且實現了比任何其它 PLD 解決方案更高的性能。借助 Xilinx ISE Design Suite 的突破性技術提高系統級設計效率並加快產品投產。 ISE Design Suite 采用各種方法來實現團隊設計、功耗優化以及簡化 IP 集成，從而分發揮 Xilinx 目標設計平台在配置邏輯、嵌入式和 DSP 設計方面的潛力 - 所有這一切均可通過緊密集成的設計流程來實現。
ISE Design Suite: Logic Edition
Front-to-back FPGA 邏輯設計
基於 RTL 的設計的完整流程
實現終極生產率
實現最佳系統性能
ISE Design Suite: Embedded Edition
集成嵌入式設計解決方案
硬和軟微處理器使用一條工具鏈
降低開發板復雜度和成本
利用智能工具和 IP 核
ISE Design Suite: DSP Edition
面向高性能 DSP 系統
利用適於各種方法的工具和 IP 核
解決 DSP 性能瓶頸
實現領先算法
ISE Design Suite: System Edition
集成軟件解決方案，支持邏輯/連接嵌入，綜合方法，和DSP設計
實現了更高的設計生產率
實現性能突破，獲取功率和成本優勢
集中精力實現設計差異化
ISE WebPACK 設計軟件
The industry's only free, fully featured front-to-back FPGA design solution for Linux, Windows XP, and Windows Vista.
免費 FPGA 和 CPLD 邏輯設計解決方案
可以輕松升級到任何 ISE Design Suite Edition
利用業界領先的生產率、性能和功率著手設計的最簡單、成本最低的途徑
分層設計流程
保存結果，並使用ISEDesign Suite 任意版本提供的結構設計流程提高效率
設計保存
團隊設計
部分重配置
Xilinx ISE Design Suite 設計套件是面向 Virtex -6 和 Spartan -6 FPGA 系列並針對生產力精心優化的工具套件，在降低功耗與成本方面取得了突破性進展。作為業界唯一一款特定領域的設計套件，賽靈思最新版本的發布， 是這一行業屢獲殊榮的軟件不斷發展和演進的又一重要一步，它將進一步提高設計生產力和系統性能，使邏輯、嵌入式、數字信號處理 (DSP) 和系統設計人員能夠更輕松地推出更復雜的創新型可編程電子產品，從而加速產品上市進程並提升產品質量。
ISE DESIGN SUITE 的主要優勢
針對 VIRTEX -6 和 SPARTAN -6 FPGA：
● 利用自動時鐘門控技術將動態功耗降低30%之多
● 利用第四代部分重配置設計流程降低系統成本
● PlanAhead - 面向邏輯設計人員的新款 RTL 到比特流設計流程
● 利用 AXI4 接口實現即插即用式 FPGA 設計
借助 Xilinx ISE Design Suite 的突破性技術提高系統級設計效率並加快產品投產。 ISE Design Suite 采用各種方法來實現團隊設計、功耗優化以及簡化 IP 集成，從而分發揮 Xilinx 目標設計平台在配置邏輯、嵌入式和 DSP 設計方面的潛力 - 所有這一切均可通過緊密集成的設計流程來實現。


資源更新列表
http://www.VeryCD.com/i/5190747/create/fol...postTime
Xilinx introduced the ISE Design Suite software to enable breakthrough optimizations for power and cost with greater design productivity. For the first time, ISE design tools deliver 'intelligent' clock-gating technology that reduces dynamic power consumption by as much as 30 percent. The new suite also provides advances in timing-driven design reservation, AMBA 4 AXI4-complaint IP support for plug-and-play design, and an intuitive design flow with fourth-generation partial reconfiguration capabilities that lowers system cost for a broad range of high performance applications.
With full production support for all Xilinx Virtex-6 and Spartan-6 FPGA families, the ISE release continues its evolution as the industry's only domain-specific design suite with interoperable design flows and tool configurations for logic, digital signal processing (DSP), embedded processing, and system-level design. In addition, Xilinx incorporated a number of software infrastructure and methodology enhancements that improve run time, streamline system integration, and expand IP interoperability across its latest generation device families and Targeted Design Platforms.
Intelligent Automation for Power Optimization
ISE Design Suite introduces the FPGA industry's first intelligent clock-gating technology with fully automated analysis and fine-grain (logic slice) optimization capabilities specifically developed to reduce the number of transitions, a primary contributing factor of dynamic power dissipation in digital designs. The technology works by analyzing designs using a series of unique algorithms to detect sequential elements...

代碼

iNSTALLATiON NOTES
1) unpack
2) burn / mount
3) install
4) crack dir
INFO:
SUPPLiER....: TEAM TBE
DATE ...: 02.01.2013
CRACKER ....: TEAM TBE
TYPE ...: Industrial
OS .....: WINDOWS
LANGUAGE .: English

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      哕       圹                     Xilinx                   圹     
        唼  苘圹?            ISE Design Suite v14.4           咣圮?        苘圹哌?                                                 斑咣圮?      懿圹甙?     SUPPLiER....: TEAM TBE    DATE ...: 02.01.2013  鞍咣鄄?     薏圹莅        CRACKER ....: TEAM TBE    TYPE ...: industrial    稗圹草
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